Book Chapter
• Gofman, Sinjini Mitra, Yu Bai, and Yoonsuk Choi,”Security, Privacy, and Usability Challenges in Selfie Bio-metrics.” In Selfie Biometrics, pp. 313-353. Springer, Cham, 2019.
• X.Tang, X. Xu,Y. Bai,”Computer Essential ,” Tsinghua University Press, ISBN 978730243418.
Journal Papers
• [IEEE TGRS (IF=7.5)] Tian, Rui, Danqing Liu, Yu Bai, Yu Jin, Guanliang Wan, and Yanhui Guo. “Swin-
MSP: A Shifted Windows Masked Spectral Pretraining Model for Hyperspectral Image Classification.” IEEE
Transactions on Geoscience and Remote Sensing (2024).
• [Elsevier Internet of Things’24 (IF=6.0)] Sun, Y., Bai, Y., & Zhou, Z. (2024). Collaboration of AI, big data,and blockchain in Internet of Things (IoT): Emerging trends and perspectives. Internet of Things, 101234.
• [IEEE JESTIE’23 (IF=5.462)] X. Ma, S. Luo, R. F. DeMara, P. Sun, Q. Peng and Y. Bai, “Binarized l1 -
Regularization Parameters Enhanced Strip-Wise Optimization Algorithm for Efficient Neural Network Op-
timization,” in IEEE Journal of Emerging and Selected Topics in Industrial Electronics, doi: 10.1109/JESTIE.2023.3313050.
• [Elsevier Modelling & Software’23 (IF=5.609)] An, Li, Volker Grimm, Yu Bai, Abigail Sullivan, B. L. Turner II, Nicolas Malleson, Alison Heppenstall et al. “Modeling agent decision and behavior in the light of data science and artificial intelligence.” Environmental Modelling & Software (2023): 105713.
• [Elsevier Internet of Things’23 (IF=5.711)] Liu, Mingshuo, Miao Yin, Kevin Han, Ronald F. DeMara, Bo
Yuan, and Yu Bai. “Algorithm and hardware co-design co-optimization framework for LSTM accelerator
using quantized fully decomposed tensor train.” Elsevier Internet of Things 22 (2023): 100680.
• [Micromachines’22 (Impact Factor=3.523)] Liu, Mingshuo, Shiyi Luo, Kevin Han, Ronald F. DeMara, and
Y. Bai. “Autonomous Binarized Focal Loss Enhanced Model Compression Design Using Tensor Train De-
composition.” Micromachines 13, no. 10 (2022): 1738.
• [IEEE TED’22 (Impact Factor=2.917)] M. Liu, P. Borulkar, M. Hossain, R. F. Demara and Y. Bai, “Spin-
Orbit Torque Neuromorphic Fabrics for Low-Leakage Reconfigurable In-Memory Computation,” in IEEE
Transactions on Electron Devices, vol. 69, no. 4, pp. 1727-1735, April 2022, doi: 10.1109/TED.2021.3140040.
• [Springer JPUC’21 (Impact Factor=3.006)] Xia, Y., Qu, S., Goudos, S., Bai, Y., & Wan, S. (2021). Multi-object tracking by mutual supervision of CNN and particle filter. Personal and Ubiquitous Computing, 25(6),979-988.
• [Springer JPUC’19 (Impact Factor=2.395)] Xia, Yu, Shiru Qu, Sotirios Goudos, Y. Bai, and Shaohua Wan.”Multi-object tracking by mutual supervision of CNN and particle filter.” Personal and Ubiquitous Comput-ing (2019): 1-10. Springer.
• [IEEE TETC’19 (IF=4.989)] A. Samiee, P. Borulkar, R. F. DeMara, P. Zhao and Y. Bai, “Low-Energy Ac-
celeration of Binarized Convolutional Neural Networks using a Spin Hall Effect based Logic-in-Memory
Architecture,” in IEEE Transactions on Emerging Topics in Computing. doi: 10.1109/TETC.2019.2915589
• [IEEE ACCESS’19 (IF=3.55)] Ashkan Samiee,Yunchuan Sun, Ronald DeMara, Yoonsuk Choi, and Yu Bai,”Energy
Efficient Mobile Service Computing with Differential Spintronic-C-elements: A Logic-in-Memory Asyn-
chronous Computing Paradigm” 10.1109/ACCESS.2019.2911098
• [Springer JWCN’19 IF=2.407] Yanhui Guo, Xijie Yin, Xuechen Zhao, Dongxin Yang, and Yu Bai, “Hyper-
spectral image classification with SVM and guided filter.” EURASIP Journal on Wireless Communications
and Networking, 56 (2019). https://doi.org/10.1186/s13638-019-1346-z
• [IEEE JSTARS’19 IF=2.777] Yanhui Guo, Han Cao, Jianjun Bai, and Yu Bai, “High Efficient Deep Feature
Extraction and Classification of Spectral-Spatial Hyperspectral Image Using Cross Domain Convolutional
Neural Networks,” in IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing,
vol. 12, no. 1, pp. 345-356, Jan. 2019, doi: 10.1109/JSTARS.2018.2888808.
• [IEEE ACCESS’18 IF=3.55] Yanhui Guo, Cao Han, Yunchuan Sun, and Yu Bai, “ Spectral-Spatial Hyper-
spectral Image Classification with K-Nearest Neighbor and Guided filter,” IEEE Access, vol. PP, no. 99, pp.1-1. doi: 10.1109/ACCESS.2018.2820043.
• [IEEE ACCESS’18 IF=3.55] Yanhui Guo, Siming Han, Chuanhe Shen, Ying Li, Xijie Yin and Yu Bai, “An
Adaptive SVR for High-Frequency Stock Price Forecasting,” in IEEE Access, vol. PP, no. 99, pp. 1-1. doi:
10.1109/ACCESS.2018.2806180
• [IEEE TMSCS’17] Yu Bai, D. Fan, and M. Lin, “Stochastic-Based Synapse and Soft-Limiting Neuron with
Spintronic Devices for Low Power and Robust Artificial Neural Networks,” in IEEE Transactions on Multi-
Scale Computing Systems, 10.1109/TMSCS.2017.2787109.
• [IEEE TC’17 IF=2.916] Yu Bai, R. F. DeMara, J. Di and M. Lin, “Clockless Spintronic Logic: A Robust and
Ultra-Low Power Computing Paradigm,” in IEEE Transactions on Computers, vol. PP, no. 99, pp. 1-1. doi:
10.1109/TC.2017.2776139
• [IEEE TETC’16 IF=3.626] M. Alawad, Yu Bai, R. DeMara and M. Lin, “Robust Large-Scale Convolution
through Stochastic-Based Processing Without Multipliers,” in IEEE Transactions on Emerging Topics in
Computing, vol. PP, no. 99, pp. 1-1. doi: 10.1109/TETC.2016.2601220
• [JPLEA’16] Yu Bai, Lin M.,”Stochastic-Based Spin-Programmable Gate Array with Emerging MTJ Device
Technology,” Journal of Low Power Electronics and Applications., 2016; 6(3):15.,
• [Electronics’15 IF=2.11] Yu Bai, Alawad M, DeMara RF, Lin M.,”Optimally fortifying logic reliability through criticality ranking,” Electronics, 2015; 4(1):150-172.
• [JECE’12 IF=1.04] Lin M.,Yu Bai, DeMara RF,”Selectively fortifying reconfigurable computing device to
achieve higher error resilience,” Journal of Electrical and Computer Engineering (JECE 2012), Article 5, Jan.2012. DOI=http://dx.doi.org/10.1155/2012/593532.
Conference Papers
• [ACM GLSVLSI’24] Yarnell, Richard C., Mousam Hossain, Raul Graterol, Ayush Pindoria, Sujan Ghimire,
Muhtasim Alam Chowdhury, Soheil Salehi, Yu Bai, and Ronald F. Demara. “Educational Tool-spaces for
Convolutional Neural Network FPGA Design Space Exploration Using High-Level Synthesis.” In Proceed-
ings of the Great Lakes Symposium on VLSI 2024, pp. 343-346. 2024.
• [IEEE CSCE’23] E. Britten, M. Gofman and Y. Bai, “FPGA-Accelerated Password Cracking,” 2023 Congress
in Computer Science, Computer Engineering, & Applied Computing (CSCE), Las Vegas, NV, USA, 2023,
pp. 2541-2547, doi: 10.1109/CSCE60160.2023.00408.
• [HICE’23] Y. Bai, and Doina Bein. “Twenty Second Annual Hawaii International Conference on Educa-
tion.” In Conference proceedings Hawaii International Conference on Education. HICE 2023, 2023.
• [IEEE GLSVLSI’23] Yarnell, Richard C., Mousam Hossain, Raul Graterol, Ayush Pindoria, Sujan Ghimire,
Muhtasim Alam Chowdhury, Soheil Salehi, Yu Bai, and Ronald F. Demara. “Educational Tool-spaces for
Convolutional Neural Network FPGA Design Space Exploration Using High-Level Synthesis.” In Proceed-
ings of the Great Lakes Symposium on VLSI 2024, pp. 343-346. 2024.
• [IEEE ISQED’23] X. Ma, J. Tang and Y. Bai, “Locality-sensing Fast Neural Network (LFNN): An Efficient
Neural Network Acceleration Framework via Locality Sensing for Real-time Videos Queries,” 2023 24th
International Symposium on Quality Electronic Design (ISQED), San Francisco, CA, USA, 2023, pp. 1-8,
doi: 10.1109/ISQED57927.2023.10129395.
• [IEEE SOCC’22] Ma, Xiaotian, Kevin Han, Yucheng Yang, Ronald F. DeMara, and Yu Bai. “Hardware
Oriented Strip-wise Optimization (HOSO) Framework for Efficient Deep Neural Network.” In 2022 IEEE
35th International System-on-Chip Conference (SOCC), pp. 1-6. IEEE, 2022.
• [IEEE SoutheastCon’22] Crumley, D., M. Hossain, K. Martin, F. Ivey, Richard Yarnell, R. F. DeMara, and
Yu Bai. “Rehosting YOLOv2 Framework for Reconfigurable Fabric-based Acceleration.” In SoutheastCon
2022, pp. 445-446. IEEE, 2022.
• [ASEE’22 ] Kurwadkar, Sudarshan, Salvador Mayoral, Antoinette Linton, Doina Bein, Paulina Reina, Jidong
Huang, Yu Bai, Ariana Vasquez, and Kirk Vandersall. “Advancing Student Success Through Integrated
Sociocultural and Academic Intervention Strategies.” In 2022 ASEE Annual Conference & Exposition. 2022.
• [DAC’21] Liu, Mingshuo, Miao Yin, Kevin Han, Shiyi Luo, Mingju Liu, Ronald F. DeMara, Bo Yuan, and Yu
Bai. “Algorithm and Hardware Co-Design Co-Optimization Framework for LSTM Accelerator using Fully
Decomposed Tensor Train.” DAC (Work-in-Progress) (2021).
• [ASEE’21] Bein, Doina, Jidong Huang, Yu Bai, Sudarshan T. Kurwadkar, and Paulina Reina. “Lessons
Learned From the First-Year Enrichment Program for Engineering and Computer Science Students in the
ASSURE-US Program.” In 2021 ASEE Virtual Annual Conference Content Access. 2021.
• [ASAP’21] Liu, Mingshuo, Shiyi Luo, Kevin Han, Bo Yuan, Ronald F. DeMara, and Yu Bai. “An Efficient
Real-Time Object Detection Framework on Resource-Constricted Hardware Devices via Software and Hard-
ware Co-design.” In 2021 IEEE 32nd International Conference on Application-specific Systems, Architec-
tures and Processors (ASAP), pp. 77-84. IEEE, 2021.
• [GLSVLSI’21] Liu, Mingshuo, Kevin Han, Shiyi Luo, Mingze Pan, Mousam Hossain, Bo Yuan, Ronald F.
DeMara, and Yu Bai. “An Efficient Video Prediction Recurrent Network using Focal Loss and Decomposed
Tensor Train for Imbalance Dataset.” In Proceedings of the 2021 on Great Lakes Symposium on VLSI, pp.
391-396. 2021.
• [ASEE’20] Sudarshan Kurwadkar, Jidong Huang, Doina Bein, Mayoral, Salvador, and Yu Bai, “Improving
STEM Education for Lower-division College Students at HSI by Utilizing Relevant Sociocultural and Aca-
demic Experiences: First Year Results from ASSURE-US Project” Annual Conference of American Society
for Engineering Education (ASEE2020), accepted
• [ICIT’20] Janelle Estabillo, Derrick Lee, Christopher Ly, Graciela Orozco, Doina Bein, Sudarshan Kurwad-
kar, Jidong Huang, and Yu Bai. “Using Projects on Clustering and Linear Regression to Develop Basic
Research Skills in Freshmen and Sophomore Undergraduate Students.” In 17th International Conference on
Information Technology–New Generations (ITNG 2020), pp. 379-384. Springer, Cham, 2020.
• [ICIT’20] Ahmed, A., Macias, L., McCune, M., Medina, M., Orozco, G., Bein, D., Kurwadkar, S., Huang, J.,
Daescu, O., Xu, D. and Bai, Y., 2020. Initiating Research Skills in Undergraduate Students Through Data
Science Projects. In 17th International Conference on Information Technology–New Generations (ITNG2020) (pp. 385-391). Springer, Cham.
• [FICC’19] Rangaswamaiah, Chaitra, Yu Bai, and Yoonsuk Choi. “Multilevel Data Concealing Technique
Using Steganography and Visual Cryptography.” In Future of Information and Communication Conference,
pp. 739-758. Springer, Cham, 2019.
• [IEEE ICASSP’19] Siyu Liao, Ashkan Samiee, Chunhua Deng, Yu Bai , Bo Yuan,”COMPRESSING DEEP
NEURAL NETWORKS USING TOEPLITZ MATRIX: ALGORITHM DESIGN AND FPGA IMPLEMENTATION”, Acceptance rate (46.5%).
• [IEEE CCWC’19] Oscar Olazabal, Mikhail Gofman, Yu Bai, Yoonsuk Choi, Noel Sandico, Sinjini Mitra, and
Kevin Pham, “Multimodal Biometrics for Enhanced IoT Security” 2019 IEEE 9th Annual Computing and
Communication Workshop and Conference (CCWC), Las Vegas, NV, USA, 2019, Accepted(?)
• [IEEE CCWC’19] Rakshith Ravishankar, Yu Bai, Yoonsuk Choi,”Design and Implementation of 32-Channel
ADPCM CODEC” 2019 IEEE 9th Annual Computing and Communication Workshop and Conference (CCWC),Las Vegas, NV, USA, 2019, Accepted(?)
• [ACM GLSVLSI’18] Shaahin Angizi, Zhezhi He, Yu Bai , Jie Han, Mingjie Lin and Deliang Fan, “Lever-
aging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Network,” In Proceedingsof the 2018 on Great Lakes Symposium on VLSI (GLSVLSI ’18). ACM, New York, NY, USA, 397-402. DOI:
https://doi.org/10.1145/3194554.3194618 (Invited) Acceptance rate (28.6%)
• [IEEE CCWC’18] D. G. Anil, Y. Bai and Y. Choi, “Performance evaluation of ternary computation in SRAM
design using graphene nanoribbon field effect transistors,” 2018 IEEE 8th Annual Computing and Com-
munication Workshop and Conference (CCWC), Las Vegas, NV, USA, 2018, pp. 382-388. doi: 10.1109/
CCWC.2018.8301723 Acceptance rate (?)
• [IEEE/ACM MICRO’17] Caiwen Ding, Siyu Liao, Yanzhi Wang, Zhe Li, Ning Liu, Youwei Zhuo, Chao
Wang, Xuehai Qian, Yu Bai, Geng Yuan, Xiaolong Ma, Yipeng Zhang, Jian Tang, Qinru Qiu, Xue Lin, and
Bo Yuan. 2017. CirCNN: accelerating and compressing deep neural networks using block-circulant weight
matrices. In Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture
(MICRO-50 ’17). ACM, New York, NY, USA, 395-408. DOI: https://doi.org/10.1145/3123939.3124552 Acceptance rate (18%)
• [IIKI’17] Yanhui Guo, Siming Han, Ying Li, Cuifen Zhang and Yu Bai,”K-Nearest Neighbor combined
with guided filter for hyperspectral image classfication” 2017 International Conference on Identification,
Information and Knowledge in the Internet of Things (IIKI2017), 2018 Dec 31;129:159-65. Acceptance rate
(31.2%)
• [IEEE MWSCAS’17] Azadeh Famili, Yoonsuk Choi, and Yu Bai,”High Efficient Reconfigurable PUF Through
Spin Hall-Induced Coupled-Oscillators” 2017 IEEE 60th International Midwest Symposium on Circuits and
Systems (MWSCAS 2017),DOI: 10.1109/MWSCAS.2017.8053124, invited paper. Acceptance rate (36.3%)
• [ACM GLSVLSI’17] Yu Bai, Sharon Hu, Ronald F.DeMara, Mingjie Lin,”A Spin-Orbit Torque based Cellular
Neural Net- work (CNN) Architecture” 2017 27rd ACM International Conference on Great lakes symposium
on VLSI (GLSVLSI2017), 2017 :59-64. Acceptance rate (24.4%)
• [IEEE IIKI’16] Y. Guo, L. Meng, X. Tang, Y. Shi, H. Cao and Y. Bai, “Artificial Haze Immune Algorithm
for Image Processing,” 2016 International Conference on Identification, Information and Knowledge in the
Internet of Things (IIKI), Beijing, 2016, pp. 93-98. doi: 10.1109/IIKI.2016.14 Acceptance rate (38%)
• [IEEE ICICM’16] Yu Bai, Mingjie Lin,” Stochastic-Based Logic Circuit Synthesis and Implementation through Large-Fanin Threshold Logic with Magnetic Tunneling Junctions “ 2016 IEEE International Conference on Integrated Circuits and Microsystems (ICICM 2016), Chengdu, 2016, pp. 55-60. doi: 10.1109/ICAM.2016.7813563. Acceptance rate (47%)
• [ACM GLSVLSI’16] Yu Bai, Hu B., Kuang W., Lin M.,” Magnetic domain wall implemented null con-
vention logic,” 26rd ACM International Conference on Great lakes symposium on VLSI (GLSVLSI2016),
DOI=http://dx.doi.org/10.1145/2902961.2903019. Acceptance rate (20.1%)
• [ACM FPGA’16] Yu Bai, Lin M.,”Stochastic-based spin-programmable gate array with emerging MTJ device
technology (Abstract only),” In Proceedings of the 2016 ACM/SIGDA International Symposium on Field-
Programmable Gate Arrays (FPGA16). Pages 279-279 ACM New York, NY, USA, ISBN: 978-1-4503-3856-1
doi>10.1145/2847263.2847317. Acceptance rate (24%)
• [IUCC’15] Yu Bai, Lin M.,” Universal random number generation with field-programmable analog array,”
14th 2015 IEEE International Conference on Ubiquitous Computing and Communications (IUCC2015), Liv-
erpool, 2015, pp. 1338-1343.doi: 10.1109/CIT/IUCC/DASC/PICOM.2015.198. Acceptance rate (20.3%)
• [ACM FPGA’15] Yu Bai, Lin M.,”Energy-efficient discrete signal processing with field programmable analog
arrays (FPAAs),” In Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable
Gate Arrays (FPGA15). ACM, New York, NY, USA, 84-93. DOI=10.1145/2684746.2689078. Acceptance rate
(24%)
• [IEEE ReConFig’14] Yu Bai, Lin M.,”Stochastically computing discrete Fourier transform with reconfig-
urable digital fabric,”ReConFigurable Computing and FPGAs (ReConFig), 2014 International Conference
on , vol., no., pp.1,7, 8-10 Dec. 2014 doi: 10.1109/ReConFig.2014.7032558. Acceptance rate (29.3%)
• [ACM FPGA’14] Mohammed Alawad, Yu Bai, Ronald DeMara, Lin M.,” Energy-efficient multiplier-less
discrete convolver through probabilistic domain transformation,” In Proceedings of the 2014 ACM/SIGDA
Interna- tional Symposium on Field-programmable Gate Arrays (FPGA14). ACM, New York, NY, USA, 185-188. DOI=10.1145/2554688.2554769 http://doi.acm.org/10.1145/2554688.2554769. Acceptance rate (36%)
• [ACM FPGA’14] Yu Bai, Mohammed Alawad, and Mingjie Lin.,”Optimally mitigating BTI-induced FPGA
device ageing with discriminative voltage scaling (abstract only), “In Proceedings of the 2014 ACM/SIGDA
International Symposium on Field programmable Gate Arrays (FPGA14). ACM, New York, NY, USA, 246-246. DOI=10.1145/2554688.2554752 http://doi.acm.org/10.1145/2554688.2554752. Acceptance rate (36%)• [IEEE ReConFig’13] Yu Bai, Alawad, M., Riera, M., Mingjie Lin, “ Improving memory performance in
reconfigurable computing architecture through hardware-assisted dynamic graph,” Reconfigurable Com-
puting and FPGAs (ReConFig), 2013 International Conference on , vol., no., pp.1,8, 9-11 Dec. 2013 doi:
10.1109/ReConFig.2013.6732300. Acceptance rate (35.2%)
• [IEEE FCCM’13] Yu Bai; Alawad, M.; Riera, M.; Mingjie Lin,” Boosting memory performance of many
core FPGA device through dynamic precedence graph,” Field-Programmable Custom Computing Machines
(FCCM), 2013 IEEE 21st Annual International Symposium on , vol., no., pp.21,24, 28-30 April 2013 doi:
10.1109/FCCM.2013. 39. Acceptance rate (28%)
• [IEEE ICAIEES’13] Mohammed Alawad, Yu Bai, and Mingjie Lin,” Probabilistic domain transformation A
robust and energy efficient computing means(regular paper),” 2013 International Conference on Advanced
Information Engi- neering and Education Science (ICAIEES 2013). Acceptance rate (?)
• [ACM FPGA’13] Yu Bai , Abigail Fuentes, Mingjie Lin, Riera, M.,”Exploiting algorithmic-level memory par-
allelism in distributed logic memory architecture through hardware assisted dynamic graph (abstract only),
“ In Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays (FPGA 2013). ACM, New York, NY, USA, 273-273. DOI=10.1145/2435264.2435333 http://doi.acm.org/10.1145/
2435264.2435333. Acceptance rate (24%)
• [IEEE HASE’11] Mingjie Lin, Yu Bai, Wawrzynek J., “Discriminatively fortified computing with reconfig-
urable digital fabric,” High-Assurance Systems Engineering (HASE), 2011 IEEE 13th International Sympo-
sium on , vol., no., pp.112,119, 10-12 Nov. 2011 doi: 10.1109/HASE.2011.49. Acceptance rate (24%)
• [DSD’11] Yu Bai, Weidong Kuang, “ Design of asynchronous circuits on FPGAs for soft error tolerance,”
Digital System Design (DSD), 2011 14th Euromicro Conference on , vol., no., pp.247,253, Aug. 31 2011-Sept.
2 2011 doi: 10.1109/DSD.2011.35. Acceptance rate (31%)
• [SPL’11] Weidong Kuang, Yu Bai, “Soft error in FPGA-implemented asynchronous circuits,” Programmable
Logic (SPL), 2011 VII Southern Conference on, vol., no., pp.221,226, 13-15 April 2011 doi: 10.1109/SPL.2011.57826 52. Acceptance rate (?)